Fix SPI clock and reinit on i.MX RT

[lynt-smitka]

Fixes two bugs in the mimxrt10xx SPI driver:

• The driver assumed LPSPI is clocked from PLL3 PFD0, but most chips set it to PLL2. SPI ran about 10% faster than requested, and frequency reported the wrong value. For example, asking for 24 MHz gave 27 MHz on the wire.
• configure() compared the requested frequency with the achieved one, and a parenthesis in the bits check was in the wrong place. So it reinitialized LPSPI on every transaction.

On a Teensy 4.1:

	Before	After
request 24 MHz	reports 24.0, wire 27.0	reports 21.12, wire 20.9
request 30 MHz	reports 24.0, wire 27.0	reports 26.4, wire 26.4
configure() + 4-byte write	156 µs	12 µs

The wire frequency was estimated from the time to send 20 KB. Built for teensy41 and metro_m7_1011, tested on Teensy 4.1. The code was written with AI help.

[dhalbert]

Thanks for fixing these!