Implement MSHV aarch64 backend by cshung · Pull Request #1626 · hyperlight-dev/hyperlight

cshung · 2026-07-06T22:39:28Z

Summary

Implements the VirtualMachine trait for MSHV on aarch64, replacing the previous stub.

Changes

mshv/aarch64.rs: Full implementation — VM creation, memory mapping, vcpu run loop with MMIO-based I/O dispatch, register access (general/FPU/special via hv_register_assoc), vcpu reset
hyperlight_vm/aarch64.rs: Wire up MshvVm::new() when MSHV is detected
memory_region.rs: Implement TryFrom<hv_arm64_memory_intercept_message> for MemoryRegionFlags

Design

Follows KVM aarch64 I/O page pattern (MMIO writes to I/O page GPA → port I/O)
Follows MSHV x86_64 patterns for partition creation and register access
Uses low-level get_reg/set_reg for system regs (get_sregs/set_sregs not available on aarch64 in mshv-ioctls)

Testing

Cross-compiled and checked for aarch64-unknown-linux-gnu locally ✅
No MSHV aarch64 runtime environment available yet for integration testing

Add a full VirtualMachine trait implementation for MSHV on aarch64, replacing the previous stub that returned false/unimplemented. Key changes: - mshv/aarch64.rs: Complete implementation including VM creation, memory mapping, vcpu run loop with MMIO-based I/O dispatch, general/FPU/special register access via hv_register_assoc, and vcpu reset support. - hyperlight_vm/aarch64.rs: Wire up MshvVm::new() so MSHV is used when detected (previously returned NoHypervisorFound). - memory_region.rs: Implement TryFrom<hv_arm64_memory_intercept_message> for MemoryRegionFlags using intercept_access_type field. The implementation mirrors the KVM aarch64 backend's I/O page pattern (MMIO writes to the I/O page GPA are interpreted as port I/O) and follows MSHV x86_64 patterns for partition creation and register access. Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com> Signed-off-by: cshung <3410332+cshung@users.noreply.github.com>

Configure the GIC, decode MMIO writes, preserve register state, and rebuild the partition during restore. Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com> Signed-off-by: cshung <3410332+cshung@users.noreply.github.com>

Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com> Copilot-Session: 6f20a05d-6bee-4e2e-b320-12f8d9759bbc Signed-off-by: cshung <3410332+cshung@users.noreply.github.com>

Check the symmetric hl-linux-arm pool for native ARM64 and read/write access to the MSHV device. Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com> Signed-off-by: cshung <3410332+cshung@users.noreply.github.com>

Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com> Signed-off-by: cshung <3410332+cshung@users.noreply.github.com>

Bound partition concurrency and recognize Arm CPU implementers. Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com> Signed-off-by: cshung <3410332+cshung@users.noreply.github.com>

ARM64 MSHV goldens need CPU-vendor support and published fixtures. Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com> Signed-off-by: cshung <3410332+cshung@users.noreply.github.com>

Copilot

🟡 Changes recommended

A guest-controlled MMIO store can overflow the PC increment and panic the host, while snapshot capture and restore also issue unnecessary separate register requests.

3 open issues

A guest can map the upper virtual-address range and execute an MMIO store at… · New
Snapshot capture issues seven separate MSHV register requests here. Fetch all seven registers with… · New
Every sandbox restore reaches this setter through HyperlightVm::apply_sregs, so these calls add… · New

What changed in this PR

This PR implements the Linux aarch64 MSHV backend, allowing Hyperlight to run ARM64 sandboxes through MSHV.

Changes:

Implements VM creation, memory mapping, MMIO dispatch, register access, and vCPU reset.
Connects MSHV to ARM64 backend selection and memory-access decoding.
Adds ARM64 MSHV CI coverage and adjusts test concurrency and platform expectations.

File	Description
`typos.toml`	Allows an identifier spelling required by MSHV bindings.
`src/hyperlight_host/tests/sandbox_host_tests.rs`	Limits parallel callbacks for ARM64 MSHV.
`src/hyperlight_host/tests/integration_test.rs`	Limits ARM64 MSHV stress-test concurrency.
`src/hyperlight_host/src/sandbox/snapshot/file/config.rs`	Accepts Arm CPU implementers in Linux snapshot tests.
`src/hyperlight_host/src/mem/memory_region.rs`	Decodes ARM64 MSHV memory-access flags.
`src/hyperlight_host/src/hypervisor/virtual_machine/mshv/aarch64.rs`	Implements the ARM64 MSHV virtual machine backend.
`src/hyperlight_host/src/hypervisor/hyperlight_vm/aarch64.rs`	Instantiates MSHV when selected on ARM64.
`.github/workflows/ValidatePullRequest.yml`	Adds debug and release ARM64 MSHV jobs.
`.github/workflows/dep_build_test.yml`	Configures runners, test limits, and snapshot-golden exclusions for ARM64 MSHV.

_{Review effort: Balanced}

Ordinary tests share four slots. Internally parallel tests reserve all slots to stay within the partition limit. The sandbox smoke test retains fifty runs across twenty-four workers. Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com> Signed-off-by: cshung <3410332+cshung@users.noreply.github.com>

MMIO instruction advancement wraps at the address boundary. Special-register capture and restore each use one request with stack-allocated associations. Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com> Signed-off-by: cshung <3410332+cshung@users.noreply.github.com>

hyperlight-gh-bot · 2026-11-11T00:59:43Z

Benchmark Results

Measured commit: bcd0df14f1b1
Baseline commit: a85325654504

kvm / amd (Linux) (➖ stable)

No benchmark improved or regressed.

Benchmark Results

function_call_codec

	`encode_control`	`decode_vec_bytes_copy`
`byte_chunks`	`771.04 ns` (➖ 1.04x slower)
`vec_bytes`	`577.99 ns` (➖ 1.01x faster)
		`374.08 µs` (➖ 1.00x faster)

payload_allocation

	`slot_pool_segmented`
`262144`	`579.03 ns` (➖ 1.10x slower)
`65536`	`142.03 ns` (➖ 1.02x faster)

sandboxes

	`create_initialized_and_drop`
`medium`	`12.84 ms` (➖ 1.02x faster)

slot_pool

	`alloc_dealloc_128`	`alloc_dealloc_4096`	`alloc_dealloc_1500`
	`8.22 ns` (➖ 1.06x slower)	`7.70 ns` (➖ 1.00x slower)	`7.71 ns` (➖ 1.00x faster)

snapshot_files

	`load_snapshot_unverified`
`small`	`104.54 µs` (➖ 1.07x slower)

virtq_readonly

	`slot_pool_segmented`	`slot_pool_segmented_fragmented`
`262144`	`7.16 µs` (➖ 1.01x slower)	`7.42 µs` (➖ 1.05x slower)
`65536`	`1.93 µs` (➖ 1.08x faster)	`2.05 µs` (➖ 1.08x slower)

virtq_readwrite

	`slot_pool_segmented`	`slot_pool_segmented_fragmented`
`262144`	`26.95 µs` (➖ 1.02x faster)
`65536`	`6.15 µs` (➖ 1.02x faster)	`6.19 µs` (➖ 1.05x faster)
`8192`	`1.02 µs` (➖ 1.02x slower)	`1.04 µs` (➖ 1.03x faster)

kvm / intel (Linux) (➖ stable)

No benchmark improved or regressed.

Benchmark Results

function_call_codec

	`encode_control`	`decode_vec_bytes_copy`
`byte_chunks`	`775.68 ns` (➖ 1.01x slower)
`vec_bytes`	`608.85 ns` (➖ 1.03x slower)
		`752.74 µs` (➖ 1.00x faster)

payload_allocation

	`slot_pool_segmented`
`262144`	`574.78 ns` (➖ 1.01x slower)
`65536`	`198.85 ns` (➖ 1.00x faster)

sandboxes

	`create_initialized_and_drop`
`medium`	`14.92 ms` (➖ 1.06x slower)

slot_pool

	`alloc_dealloc_128`	`alloc_dealloc_4096`	`alloc_dealloc_1500`
	`7.86 ns` (➖ 1.00x faster)	`7.83 ns` (➖ 1.01x faster)	`7.84 ns` (➖ 1.01x faster)

snapshot_files

	`load_snapshot_unverified`
`small`	`55.97 µs` (➖ 1.03x faster)

virtq_readonly

	`slot_pool_segmented`	`slot_pool_segmented_fragmented`
`262144`	`8.67 µs` (➖ 1.01x faster)	`8.60 µs` (➖ 1.00x faster)
`65536`	`2.48 µs` (➖ 1.02x slower)	`2.44 µs` (➖ 1.01x faster)

virtq_readwrite

	`slot_pool_segmented`	`slot_pool_segmented_fragmented`
`262144`	`35.48 µs` (➖ 1.02x slower)
`65536`	`8.15 µs` (➖ 1.00x faster)	`8.15 µs` (➖ 1.00x faster)
`8192`	`816.44 ns` (➖ 1.00x slower)	`832.81 ns` (➖ 1.01x slower)

mshv3 / amd (Linux) (➖ stable)

No benchmark improved or regressed.

Benchmark Results

function_call_codec

	`encode_control`	`decode_vec_bytes_copy`
`byte_chunks`	`940.64 ns` (➖ 1.02x slower)
`vec_bytes`	`743.50 ns` (➖ 1.01x slower)
		`413.92 µs` (➖ 1.48x slower)

payload_allocation

	`slot_pool_segmented`
`262144`	`735.28 ns` (➖ 1.01x slower)
`65536`	`195.25 ns` (➖ 1.01x slower)

sandboxes

	`create_initialized_and_drop`
`medium`	`62.16 ms` (➖ 1.18x slower)

slot_pool

	`alloc_dealloc_128`	`alloc_dealloc_4096`	`alloc_dealloc_1500`
	`9.60 ns` (➖ 1.00x faster)	`9.55 ns` (➖ 1.00x faster)	`9.72 ns` (➖ 1.01x slower)

snapshot_files

	`load_snapshot_unverified`
`small`	`109.48 µs` (➖ 1.03x slower)

virtq_readonly

	`slot_pool_segmented`	`slot_pool_segmented_fragmented`
`262144`	`9.64 µs` (➖ 1.00x faster)	`10.36 µs` (➖ 1.03x faster)
`65536`	`2.23 µs` (➖ 1.01x faster)	`2.40 µs` (➖ 1.03x faster)

virtq_readwrite

	`slot_pool_segmented`	`slot_pool_segmented_fragmented`
`262144`	`35.67 µs` (➖ 1.10x faster)
`65536`	`8.20 µs` (➖ 1.19x faster)	`8.32 µs` (➖ 1.26x faster)
`8192`	`1.25 µs` (➖ 1.03x slower)	`1.25 µs` (➖ 1.05x faster)

mshv3 / intel (Linux) (➖ stable)

No benchmark improved or regressed.

Benchmark Results

function_call_codec

	`encode_control`	`decode_vec_bytes_copy`
`byte_chunks`	`931.07 ns` (➖ 1.00x faster)
`vec_bytes`	`661.71 ns` (➖ 1.00x faster)
		`747.43 µs` (➖ 1.14x slower)

payload_allocation

	`slot_pool_segmented`
`262144`	`668.91 ns` (➖ 1.01x faster)
`65536`	`261.76 ns` (➖ 1.03x slower)

sandboxes

	`create_initialized_and_drop`
`medium`	`62.04 ms` (➖ 1.35x faster)

slot_pool

	`alloc_dealloc_128`	`alloc_dealloc_4096`	`alloc_dealloc_1500`
	`8.70 ns` (➖ 1.00x faster)	`8.70 ns` (➖ 1.00x faster)	`8.70 ns` (➖ 1.00x faster)

snapshot_files

	`load_snapshot_unverified`
`small`	`55.77 µs` (➖ 1.01x slower)

virtq_readonly

	`slot_pool_segmented`	`slot_pool_segmented_fragmented`
`262144`	`7.92 µs` (➖ 1.00x faster)	`8.05 µs` (➖ 1.00x slower)
`65536`	`2.27 µs` (➖ 1.01x faster)	`2.28 µs` (➖ 1.00x faster)

virtq_readwrite

	`slot_pool_segmented`	`slot_pool_segmented_fragmented`
`262144`	`38.20 µs` (➖ 1.02x faster)
`65536`	`7.47 µs` (➖ 1.02x faster)	`7.66 µs` (➖ 1.02x slower)
`8192`	`904.57 ns` (➖ 1.01x faster)	`911.71 ns` (➖ 1.03x faster)

hyperv-ws2025 / amd (Windows) (➖ stable)

No benchmark improved or regressed.

Benchmark Results

function_call_codec

	`encode_control`	`decode_vec_bytes_copy`
`byte_chunks`	`1.20 µs` (➖ 1.00x slower)
`vec_bytes`	`793.16 ns` (➖ 1.01x faster)
		`1.91 ms` (➖ 1.01x faster)

payload_allocation

	`slot_pool_segmented`
`262144`	`784.57 ns` (➖ 1.00x faster)
`65536`	`230.34 ns` (➖ 1.02x faster)

sandboxes

	`create_initialized_and_drop`
`medium`	`12.20 ms` (➖ 1.00x slower)

slot_pool

	`alloc_dealloc_128`	`alloc_dealloc_4096`	`alloc_dealloc_1500`
	`9.99 ns` (➖ 1.00x faster)	`10.12 ns` (➖ 1.01x slower)	`10.22 ns` (➖ 1.03x slower)

snapshot_files

	`load_snapshot_unverified`
`small`	`800.64 µs` (➖ 1.01x slower)

virtq_readonly

	`slot_pool_segmented`	`slot_pool_segmented_fragmented`
`262144`	`8.92 µs` (➖ 1.06x faster)	`9.11 µs` (➖ 1.19x faster)
`65536`	`2.74 µs` (➖ 1.08x slower)	`2.38 µs` (➖ 1.01x faster)

virtq_readwrite

	`slot_pool_segmented`	`slot_pool_segmented_fragmented`
`262144`	`38.33 µs` (➖ 1.18x faster)
`65536`	`8.73 µs` (➖ 1.03x faster)	`9.03 µs` (➖ 1.01x faster)
`8192`	`1.27 µs` (➖ 1.04x faster)	`1.30 µs` (➖ 1.05x slower)

hyperv-ws2025 / intel (Windows) (➖ stable)

No benchmark improved or regressed.

Benchmark Results

function_call_codec

	`encode_control`	`decode_vec_bytes_copy`
`byte_chunks`	`1.23 µs` (➖ 1.03x slower)
`vec_bytes`	`773.53 ns` (➖ 1.01x slower)
		`3.21 ms` (➖ 1.01x slower)

payload_allocation

	`slot_pool_segmented`
`262144`	`769.88 ns` (➖ 1.03x slower)
`65536`	`209.47 ns` (➖ 1.00x slower)

sandboxes

	`create_initialized_and_drop`
`medium`	`14.67 ms` (➖ 1.22x faster)

slot_pool

	`alloc_dealloc_128`	`alloc_dealloc_4096`	`alloc_dealloc_1500`
	`9.67 ns` (➖ 1.00x faster)	`10.22 ns` (➖ 1.01x slower)	`9.65 ns` (➖ 1.00x slower)

snapshot_files

	`load_snapshot_unverified`
`small`	`688.70 µs` (➖ 1.06x slower)

virtq_readonly

	`slot_pool_segmented`	`slot_pool_segmented_fragmented`
`262144`	`7.45 µs` (➖ 1.03x faster)	`7.68 µs` (➖ 1.01x slower)
`65536`	`2.48 µs` (➖ 1.06x slower)	`2.30 µs` (➖ 1.00x faster)

virtq_readwrite

	`slot_pool_segmented`	`slot_pool_segmented_fragmented`
`262144`	`43.17 µs` (➖ 1.41x faster)
`65536`	`8.27 µs` (➖ 1.21x faster)	`8.23 µs` (➖ 1.11x faster)
`8192`	`1.08 µs` (➖ 1.02x slower)	`1.19 µs` (➖ 1.07x slower)

_{Reported by cargo ci bench-report --candidate run:42930964520 --config-file bench_report.toml.}

cshung added the kind/enhancement For PRs adding features, improving functionality, docs, tests, etc. label Jul 7, 2026

cshung force-pushed the cshung/mshv-aarch64 branch from b34cc5d to fb92ede Compare July 31, 2026 16:13

cshung force-pushed the cshung/mshv-aarch64 branch from fb92ede to 3736e16 Compare August 12, 2026 14:55

cshung force-pushed the cshung/mshv-aarch64 branch 2 times, most recently from b440e24 to 4ada969 Compare August 20, 2026 17:42

cshung force-pushed the cshung/mshv-aarch64 branch from 4ada969 to 7f2289d Compare September 2, 2026 22:47

cshung force-pushed the cshung/mshv-aarch64 branch from a70dcfa to 1b275f2 Compare September 29, 2026 05:30

cshung force-pushed the cshung/mshv-aarch64 branch from 1b275f2 to 2f42d32 Compare November 2, 2026 17:10

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cshung force-pushed the cshung/mshv-aarch64 branch from 2f42d32 to 0e44f0a Compare November 5, 2026 17:24

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cshung and others added 11 commits November 10, 2026 08:51

fix: harden ARM64 MSHV backend

355b29d

Configure the GIC, decode MMIO writes, preserve register state, and rebuild the partition during restore. Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com> Signed-off-by: cshung <3410332+cshung@users.noreply.github.com>

Match mutable virtual machine register setters

cd70f95

Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com> Copilot-Session: 6f20a05d-6bee-4e2e-b320-12f8d9759bbc Signed-off-by: cshung <3410332+cshung@users.noreply.github.com>

ci: probe WSL on Windows ARM64

161a247

Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com> Copilot-Session: 6f20a05d-6bee-4e2e-b320-12f8d9759bbc Signed-off-by: cshung <3410332+cshung@users.noreply.github.com>

ci: attempt WSL installation

bae3107

Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com> Copilot-Session: 6f20a05d-6bee-4e2e-b320-12f8d9759bbc Signed-off-by: cshung <3410332+cshung@users.noreply.github.com>

ci: enable WSL component

e329241

Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com> Copilot-Session: 6f20a05d-6bee-4e2e-b320-12f8d9759bbc Signed-off-by: cshung <3410332+cshung@users.noreply.github.com>

Revert temporary ARM64 WSL probe

ad4dfb9

Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com> Copilot-Session: 6f20a05d-6bee-4e2e-b320-12f8d9759bbc Signed-off-by: cshung <3410332+cshung@users.noreply.github.com>

ci: probe ARM64 Linux MSHV runner pool

87f7338

Check the symmetric hl-linux-arm pool for native ARM64 and read/write access to the MSHV device. Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com> Signed-off-by: cshung <3410332+cshung@users.noreply.github.com>

ci: target provisioned ARM64 MSHV pool

796b2c3

Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com> Signed-off-by: cshung <3410332+cshung@users.noreply.github.com>

test: accommodate ARM64 MSHV hosts

a4f490e

Bound partition concurrency and recognize Arm CPU implementers. Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com> Signed-off-by: cshung <3410332+cshung@users.noreply.github.com>

ci: run ARM64 MSHV pull request tests

747ee00

ARM64 MSHV goldens need CPU-vendor support and published fixtures. Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com> Signed-off-by: cshung <3410332+cshung@users.noreply.github.com>

cshung force-pushed the cshung/mshv-aarch64 branch from e039b60 to 747ee00 Compare November 10, 2026 16:59

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cshung marked this pull request as ready for review November 10, 2026 18:22

cshung requested review from danbugs, dblnz, devigned, jprendes and jsturtevant as code owners November 10, 2026 18:22

cshung requested review from andreiltd, ludfjig, simongdavies, squillace and syntactically as code owners November 10, 2026 18:22

Copilot AI balanced review requested due to automatic review settings November 10, 2026 18:22

Copilot started reviewing on behalf of cshung November 10, 2026 18:23

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Comment thread src/hyperlight_host/src/hypervisor/virtual_machine/mshv/aarch64.rs Resolved

Comment thread src/hyperlight_host/src/hypervisor/virtual_machine/mshv/aarch64.rs Resolved

Comment thread src/hyperlight_host/src/hypervisor/virtual_machine/mshv/aarch64.rs Resolved

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cshung commented Jul 6, 2026

Summary

Changes

Design

Testing

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🟡 Changes recommended

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hyperlight-gh-bot Bot commented Nov 11, 2026

Benchmark Results

Benchmark Results

function_call_codec

payload_allocation

sandboxes

slot_pool

snapshot_files

virtq_readonly

virtq_readwrite

Benchmark Results

function_call_codec

payload_allocation

sandboxes

slot_pool

snapshot_files

virtq_readonly

virtq_readwrite

Benchmark Results

function_call_codec

payload_allocation

sandboxes

slot_pool

snapshot_files

virtq_readonly

virtq_readwrite

Benchmark Results

function_call_codec

payload_allocation

sandboxes

slot_pool

snapshot_files

virtq_readonly

virtq_readwrite

Benchmark Results

function_call_codec

payload_allocation

sandboxes

slot_pool

snapshot_files

virtq_readonly

virtq_readwrite

Benchmark Results

function_call_codec

payload_allocation

sandboxes

slot_pool

snapshot_files

virtq_readonly

virtq_readwrite

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